Coupling Strategies for Silicon Photonics Integrated Chips
Schematic of a Silicon Photonics circuit. Arrays of angle-polished and planar polished fibres are respectively used to couple the grating- and edge-couplers integrated on the chip. An enlarged schematic of a grating is shown at the top.
Silicon photonics has rapidly emerged as one of the most prominent technological platforms for the implementation of integrated optical devices. Its compatibility with standard complementary metal-oxide-semiconductor transistor (CMOS) fabrication processes, has enabled low-cost and high-volume manufacturing, making silicon photonics suitable for the implementation of high bit-rate transceivers for data-centre and direct-detection scheme applications. At the same time, silicon photonics technology has been in the forefront for the realization of a number of integrated components for various applications ranging from sensors to microfluidics.
Historically, one of the biggest challenges in designing silicon photonic components, has been related to the realization of high-performance mode converters which can efficiently transfer the light from a standard optical fibre to the integrated circuits. Indeed, this task is particularly challenging due to the strong intrinsic birefringence of integrated silicon waveguides, and to the large size mismatch existing between the optical mode of silicon waveguides and that of single mode fibres (which is almost 800 times larger).
To overcome this issue, the scientific community has proposed different solutions over the last 20 years, which can be schematically divided into two main categories: "end-fire" and "vertical" coupling techniques. In "end-fire" configurations the optical coupling takes place at the edge of the chip in a direction parallel to the chip surface thanks to spot size converters; conversely "vertical" coupling occurs when the incoming beam impinges on the silicon chip almost perpendicularly to its surface and takes advantage of diffractive grating couplers to re-direct the incoming radiations.
Both coupling strategies have different strengths and weaknesses, in terms of performance and ease of fabrication, and can in turn be divided into many different sub-categories, according to the specific design approach employed, and to the chosen materials and fabrication technology.
The group led by Dr. Cosimo Lacava from the Optoelectronics Research Centre, University of Southampton, provides a comprehensive scientific description and view of the various possible solutions that researchers have produced over the last years. They provide the reader with an exhaustive analysis of more than 70 structures reported in the literature, characterized by different level of design and fabrication complexity.
In the review they first describe the physical phenomena underlying the optical coupling mechanism; then they analyze the different coupling solutions available, in terms of their performance (such as coupling efficiency, bandwidth, polarization sensitivity and alignment tolerances) and their compatibility with standard CMOS process flows and packaging techniques. For the benefit of the reader, they benchmark the various coupling solutions against each other in a table at the end, providing the reader with a useful reference, without the need to scan the entire review. This work is published in Photonics Research, Volume 7, Issue 2, 2019 (Riccardo Marchetti, et al., Coupling strategies for silicon photonics integrated chips).
Dr. Cosimo Lacava comments on this work: "The ability to couple a light beam from a SM-fibre to a nanophotonic circuit has always represented a significant challenge for researches working in this field. Although the wording of the problem is simple (How we squeeze the light into a waveguide, which is 800 times smaller than an optical fibre without losing too much energy?), the physics involved is intriguing and technologically complex, and has inspired many scientists who have developed a number of elegant solutions over the years. If you are starting your career as silicon photonic engineer or simply you are looking at the various solutions available to couple the light to your designed integrated circuit, here we provide a comprehensive reference, containing the most common techniques and solutions to accomplish this basic task, vital for the realization of any modern integrated component."
They believe that future work in the field will be focused on the development of even more efficient coupling structures, where the effort to reduce the couplers insertion loss will have to cope with the necessity to attain full CMOS compatibility and reduction of assembly time and cost, in the perspective of mass-markets manufacturing.
硅光子集成芯片的耦合策略
硅光子电路的示意图。角度抛光和平面抛光光纤阵列分别用于耦合芯片上集成的光栅和边缘耦合器。图片上方为光栅的放大示意图。
目前，硅光子学已迅速成为实现集成光学器件最重要的技术平台之一，它与标准互补金属氧化物半导体（CMOS）制造工艺的兼容性使得低成本和大批量制造成为可能，这也使得硅光子学可用来实现数据中心和直接检测方案中的高比特率收发器。同时，硅光子技术一直处于集成技术的最前沿，广泛应用于从传感器到微流体的多种集成器件。
曾经，设计硅光子器件的最大挑战之一是如何实现高效的模式转换器，该器件能够将光纤中的光信号耦合到集成电路中。实际上，由于集成硅波导固有的强双折射性以及硅波导与单模光纤的光学模式之间存在的大尺寸失配（近800倍），使得硅光子器件的设计特别有挑战性。
为了克服上述问题，科学界在过去的20年中已经提出了多种解决方案，大体上可分为两大类：“端射式”和“垂直式”耦合技术。在“端射式”耦合中，由于模斑转换器的存在，光耦合发生在芯片边缘平行于芯片表面的方向上；相应地，“垂直式”耦合发生在入射光垂直于芯片表面时，然后利用衍射光栅耦合器重新定向入射光。
上述两种耦合方式在性能和制造复杂度上各有优劣，并且根据所采用的设计方法以及所选择的材料和制造技术，又可以分为许多不同的子类别。
由南安普敦大学光电子研究中心Cosimo Lacava博士领导的研究团队对过去几年里所发展出的各种解决方案进行了全面总结。根据设计水平和制造复杂度的不同，为读者提供了70多种结构的详细分析。
该总结首先描述了光耦合机制背后的物理现象；然后分析了目前可用的几种耦合方案，包括其性能（如耦合效率、带宽、极化灵敏度和对准公差）以及它们与标准CMOS工艺流程和封装技术的兼容性。在最后的表格中对各种耦合方案进行了对比，为读者提供了有用的参考。这项总结工作发表在Photonics Research 2019年第7卷第2期上(Riccardo Marchetti, et al., Coupling strategies for silicon photonics integrated chips)。
Cosimo Lacava博士认为："将光从单模光纤耦合入纳米光子电路一直是该领域研究的重大挑战。虽然这个问题看起来很简单（如何将光耦合入比光纤小800倍的波导而不会损失太多的能量），但其中所涉及的物理问题非常复杂，这激发了科学家们的灵感，开发了许多优秀的解决方案。如果您是一名初级硅光子工程师，或者是正在寻找将光耦合进集成电路方案的学者，本文将为此提供全面的参考，包括实现现代集成器件的大部分常用技术和解决方案。"
该研究团队相信，该领域未来的工作将聚焦于开发高效的耦合结构。从大规模制造的角度而言，为了实现与CMOS良好的兼容性、减少组装时间和成本，减少耦合器的插入损耗是十分必要的。